Syllabus
10-Week Low-Level CS: Bits, CPU, ARM64 & x86-64 Assembly, LLVM IR, Linux Internals, and Performance
Full week-by-week plan. Each entry lists the theme and reading. Detailed theory exercises, implementation tasks, benchmarks/inspection, and definitions of done live in the weekly lecture notes.
Prerequisites and relationship to Courses 5 and 6. This course overlaps least with the foundation courses, so the 10-week schedule is reached mainly by merging adjacent weeks rather than cutting. Where the foundations do apply, they are referenced: IEEE 754 floating point builds on Course 5’s numerical-computing treatment, computation/complexity reasoning on its algorithms and theory-of-computation weeks, and the transistor-level basis of logic gates on Course 6’s semiconductor-devices week. That lets Week 1 cover data representation and arithmetic, and Week 2 treat logic gates as built objects rather than re-deriving the device physics.
Note on AI use: The weekly lecture notes and syllabus summaries on this site are drafted with AI assistance, so each week has a consistent structure to study from. The substance is mine: every math proof and exercise solution is worked by hand on paper first and converted to LaTeX/KaTeX/MathJax using AI for typesetting only, and all code is written by me. The goal is to learn the material, which only happens by producing the proofs and the code myself.
Weekend rhythm: Saturday morning = reading and handwritten notes. Saturday afternoon = exercises and small implementation. Sunday morning = deeper implementation and debugging. Sunday afternoon = benchmark, inspect, and write a staff-level note.
General rule for each week: (1) theory exercises, (2) implementation, (3) measurement or inspection artifact, (4) staff-level note in docs/weekXX-topic.md.
Book abbreviations:
ARM = Plantz, Introduction to Computer Organization: ARM Edition · CS:APP = Bryant & O’Hallaron, Computer Systems: A Programmer’s Perspective (x86-64 companion) · CA = Fox, Computer Architecture · HLW = Ward, How Linux Works, 3rd ed. · LLVM Ref = the LLVM Language Reference.
On ISAs and LLVM: ARM64/AArch64 is the primary, worked-through ISA (it matches the Mac, Jetson, and Raspberry Pi). Each assembly/ABI/syscall/paging topic also gets its x86-64 equivalent (via CS:APP and the SysV ABI), and LLVM IR is used as the architecture-neutral middle layer — the same C source compiles to one IR and then to both ISAs, which is the cleanest way to see why they are “the same program, lowered differently.”
Main repository structure:
low-level-cs-course/
README.md
docs/
labs/
week01-bits-arithmetic/ week02-boolean-logic/
week03-cpu-model/ week04-arm-basics/
week05-control-stack-abi/ week06-c-layout-abi/
week07-processes-boot/ week08-memory-filesystems/
week09-networking-devices/ week10-performance-capstone/
common/
scripts/ benchmark/ cmake/Target roles: Systems Software Engineer · Embedded Software Engineer · Operating Systems/Linux Platform Engineer · Performance Engineer · Robotics/Edge AI Systems Engineer.
Setup: Primary development on M-series MacBook. Linux target: Jetson Orin Nano, Raspberry Pi, or a Linux VM. Dual-target: ARM64/AArch64 is primary (matches Apple Silicon, Jetson, and Raspberry Pi); x86-64 is the equivalent, reached via an x86-64 Linux VM, qemu-user, or Godbolt Compiler Explorer for quick side-by-side comparison. LLVM IR is the architecture-neutral layer throughout: clang -emit-llvm -S produces the IR, and llc -march=aarch64 / llc -march=x86-64 lower it to each ISA. The LLVM tools (clang, llc, opt) come with the llvm package.
# Linux packages
sudo apt update && sudo apt install -y build-essential clang llvm lldb gdb cmake \
ninja-build binutils strace ltrace linux-tools-common linux-tools-generic \
qemu-user qemu-user-static gcc-x86-64-linux-gnu \
htop tree jq curl wget git net-tools iproute2 dnsutils tcpdump \
netcat-openbsd valgrind hyperfine
# Mac packages (llvm provides clang/llc/opt; qemu runs x86-64 binaries)
brew install llvm cmake ninja qemu hyperfine binutilsPhase 1 · Weeks 1–4 — Bits, Logic, CPU, and ARM64 + x86-64 Assembly
Week 1 — Data Representation and Arithmetic: Bits, Hex, Endianness, Two’s Complement, IEEE 754
Theme: Every object becomes bytes, and every number has a finite, fallible representation.
Read: ARM Ch. 1–3 (setting the stage, data storage formats, computer arithmetic) · ARM Ch. 19 skim (fractional numbers) · CA Ch. 2 (data representation: integers, fixed point, floating point) · HLW Ch. 1 (big picture). (IEEE 754 rounding and error analysis: builds on Course 5 numerical computing.)
Week 2 — Boolean Algebra, Logic Gates, and Combinational Circuits
Theme: Build the bridge from Boolean expressions to the circuits that compute them.
Read: ARM Ch. 4–6 (Boolean algebra, logic gates, combinational logic) · CA Ch. 4–5 (switches and digital logic). (The transistor as the physical switch behind a gate: see Course 6’s semiconductor-devices week.)
Week 3 — CPU Model: Fetch, Decode, Execute, and a Tiny Emulator
Theme: Build a tiny CPU emulator to understand instruction execution from first principles.
Read: ARM Ch. 8–9 (memory, CPU) · CA Ch. 3 (basic CPU-based architecture) · CA Ch. 6–8 skim (simple machines, digital CPU design, advanced CPU design).
Week 4 — Assembly Basics on Two ISAs: ARM64, x86-64, and the LLVM IR Bridge
Theme: Learn enough AArch64 to read compiler output and write small functions, then meet its x86-64 equivalent and the LLVM IR layer that unifies them.
Read: ARM Ch. 10 (programming in assembly language) · ARM Ch. 12 (instruction details) · CS:APP Ch. 3 (machine-level representation of programs — x86-64) · LLVM Language Reference (skim: types, instructions, SSA) · CA embedded-architecture sections skim.
Phase 2 · Weeks 5–6 — Control Flow, the Stack, ABI, and C/C++ Lowering
Week 5 — Control Flow, Stack Frames, Function Calls, and the ABI
Theme: Understand how high-level control flow becomes branches, and what really happens on a function call.
Read: ARM Ch. 13 (control-flow constructs) · ARM Ch. 11 (inside the main function) · ARM Ch. 14–15 (inside subfunctions, special uses of subfunctions) · CS:APP Ch. 3 (control + procedures/stack — x86-64 and the SysV AMD64 ABI) · System V AMD64 ABI doc (skim) · CA CPU control-flow sections.
Week 6 — C/C++ Memory Layout: Structs, Arrays, Pointers, VTables, Objects
Theme: Connect C/C++ abstractions to memory layout and machine behavior.
Read: ARM Ch. 16–18 (bitwise logic, data structures, object-oriented programming) · CS:APP Ch. 3 (data layout, structs, alignment — x86-64) · HLW Ch. 15 (development tools) · HLW Ch. 16 (compiling software from C source).
Phase 3 · Weeks 7–10 — Linux Internals, Networking, Devices, and Performance
Week 7 — Processes, Syscalls, Signals, a Mini-Shell, and System Startup
Theme: Understand how Linux runs programs and how a system gets from firmware to running services.
Read: HLW Ch. 8 (processes and resource utilization) · HLW Ch. 2 (process commands) · HLW Ch. 5 (how the kernel boots) · HLW Ch. 6 (how user space starts) · HLW Ch. 7 (system configuration, logging, journald) · CS:APP Ch. 8 (exceptional control flow — the x86-64 syscall mechanism).
Week 8 — Virtual Memory, mmap, Caches, Filesystems, and I/O
Theme: Understand memory as seen by the process, MMU, and cache — and files from the shell down to syscalls and storage.
Read: HLW Ch. 1 (memory/kernel sections) · HLW Ch. 8 (memory/resource sections) · CA Ch. 10 (memory) · ARM Ch. 8 (memory) · CS:APP Ch. 9 (virtual memory — x86-64 paging) · HLW Ch. 3–4 (devices, disks and filesystems).
Week 9 — Networking, Devices, /dev, /sys, Interrupts, and GPIO
Theme: Understand networking from Linux tools to sockets, and how hardware events reach software.
Read: HLW Ch. 9 (network configuration) · HLW Ch. 10 (network applications and services) · HLW Ch. 3 (devices) · ARM Ch. 20–21 (input/output, exceptions, interrupts) · CA Ch. 9 (input/output).
Week 10 — Capstone: Performance Engineering and syslens
Theme: Learn to measure before optimizing, then tie everything together into a portfolio observability tool.
Read: HLW Ch. 15–16 (development tools, compiling from source) · CS:APP Ch. 5 (optimizing program performance) · CA advanced-CPU-design and memory-hierarchy sections · ARM + x86-64 assembly chapters review · review prior course notes.
Book Integration Map
| Book | Weeks |
|---|---|
| ARM (Plantz) — primary ISA | 1–6 (bits, arithmetic, Boolean logic, CPU, assembly, ABI, data structures) · 8 (memory) · 20–21 (devices, interrupts) |
| CS:APP (Bryant & O’Hallaron) — x86-64 equivalent | 4–5 (assembly, control, procedures/stack, SysV ABI) · 6 (data layout) · 8 (syscalls/exceptions) · 9 (virtual memory) · 5 (performance, Week 10) |
| LLVM Language Reference | 4 (IR introduced as the neutral layer) · 5, 6, 10 (one IR → both ISAs; opt-level inspection) |
| CA (Fox) | 1–4 (data representation, digital logic, CPU) · 9 (I/O) · 10 (memory) · advanced CPU/memory (Week 10) |
| HLW (Ward) | 1 (big picture) · 8 (processes, memory) · 5–7 (boot, systemd, logs) · 3–4 (devices, filesystems) · 9–10 (networking) · 15–16 (tools, compilation) |
How This Course Relates to the Others
- Foundations (Courses 5, 6): IEEE 754 builds on Course 5’s floating-point/error analysis; complexity reasoning on its algorithms/theory-of-computation weeks; the transistor-as-switch under a logic gate on Course 6’s devices week.
- Course 1 (Autonomy ML Systems + Jetson): Linux processes, ARM64, virtual memory, devices,
/sys//proc, performance tools, and systemd are used directly in the Jetson and embedded-runtime work. - Course 2 (Vulkan Simulation): memory layout, cache locality, struct alignment, ABI, and benchmarking are the machine-level foundations for efficient C++20.
Optional Weeks 11+ Direction
If prioritizing kernel internals: scheduler internals, kernel modules, eBPF, kprobes, ftrace, namespaces, cgroups, container isolation.
If prioritizing compilers/toolchains: building on the LLVM IR woven through the core weeks — writing custom LLVM passes, the instruction-selection/backend pipeline, linker internals, relocation, dynamic linking, ELF deep dive, LTO, PGO, sanitizers.
If prioritizing embedded/real-time: PREEMPT_RT, devicetree, bare-metal ARM64, RTOS concepts, JTAG, bootloader modification, Yocto.
If prioritizing security: memory-safety attack surfaces, buffer overflows at the assembly level, stack canaries, ASLR, PIE, NX, seccomp, capability-based privilege separation.