Lab 4.2 — MCP6002 Non-Inverting Amplifier

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Goal

Add voltage gain to the buffer of Lab 4.1 and confront the single most important non-ideality of a real op-amp: finite gain-bandwidth product (GBW). You will build a non-inverting amplifier with a resistor-set gain, bias it at mid-rail so an AC signal can swing in a single-supply system, then sweep frequency and watch the gain fall off exactly where GBW predicts. The takeaway — “gain is not free; you trade it against bandwidth” — governs every amplifier you’ll ever spec for a sensor front end or an anti-alias chain. This is where the abstract Bode/frequency-response ideas from Module 1 become a number you set with two resistors.

Equipment & parts

  • WANPTEK supply at 5.0 V, current-limited (~100 mA).
  • MCP6002 dual op-amp, DIP-8, with its 0.1 µF decoupling cap.
  • Siglent SDS1104X-E scope + two 10× probes.
  • Signal source: the MCP4725 DAC (Lab 3.3) generating a mid-rail-centered sine that you can step in frequency. (The ~1 kHz probe-comp square wave is a single fixed frequency and a square, so it’s fine only for a spot gain check, not the sweep.)
  • Resistors: Rg = 1 kΩ, Rf values for a few gains (e.g. 1 kΩ, 4.7 kΩ, 9.1 kΩ, 100 kΩ); two 100 kΩ for the mid-rail bias divider.
  • Two 10 µF (or 1 µF) coupling/bypass capacitors, one 0.1 µF.
  • Breadboard + jumpers.

Safety & don’t-break-it

  • ESD handling of the bare DIP as in Lab 4.1 — body only, power off to insert, decouple before powering.
  • Keep inputs inside the rails. With a mid-rail bias of 2.5 V, an input sine of amplitude \(A\) must satisfy \(2.5 \pm A\) within 0–5 V and the output \(G\cdot A\) swing must also fit — otherwise you’ll clip (that’s the next lab, done deliberately). Here keep signals small enough that gain stays linear.
  • Don’t exceed the DAC’s range driving the input; the MCP4725 outputs 0–VDD only.
  • Common grounds: DAC, scope, op-amp, and supply all share one ground rail.

Background

The gain. For the non-inverting configuration, the feedback network is a divider from \(V_\text{out}\) back to IN−. Ideal-op-amp analysis (virtual short: \(V_- = V_+ = V_\text{in}\)) gives the closed-loop gain

\[ G = \frac{V_\text{out}}{V_\text{in}} = 1 + \frac{R_f}{R_g}. \]

With \(R_f = R_g\), \(G = 2\); the follower of Lab 4.1 is the special case \(R_f = 0\) (or \(R_g = \infty\)), \(G = 1\).

The GBW limit. A real op-amp’s open-loop gain \(A(f)\) is not infinite and rolls off as a single pole: \(|A(f)| \approx A_0 / \sqrt{1+(f/f_p)^2}\), falling at −20 dB/decade above the open-loop corner \(f_p\). The product of gain and frequency along that slope is constant and equals the gain-bandwidth product:

\[ \text{GBW} = |A(f)| \cdot f \approx \text{const} \approx 1\text{ MHz (MCP6002)}. \]

Closing the loop for a gain \(G\), the amplifier holds gain \(G\) only until the open-loop gain drops to meet it. The closed-loop −3 dB bandwidth is therefore

\[ f_{-3\text{dB}} = \frac{\text{GBW}}{G} = \frac{1\text{ MHz}}{\,1 + R_f/R_g\,}. \]

So \(G = 10\) buys you only ~100 kHz of flat bandwidth; \(G = 100\) only ~10 kHz. This is the fundamental gain–bandwidth trade. Above \(f_{-3\text{dB}}\) the measured gain itself falls at −20 dB/dec.

Single-supply biasing. With one 0–5 V rail there is no negative supply, so an AC signal centered on 0 V would try to swing below ground and cut off. The fix: create a mid-rail reference (2.5 V) with a 100 kΩ/100 kΩ divider (bypassed by 0.1 µF for a low-impedance AC ground), and DC-bias IN+ there through the signal path. AC-couple the input signal (series capacitor) onto that bias so the op-amp amplifies the AC riding on 2.5 V, and AC-couple the output if the next stage wants only the AC. The gain equation is unchanged; the bias just recenters the swing.

Procedure

Part A — Build a G = 2 non-inverting amp with mid-rail bias.

  1. Supply off. Bring up the MCP6002 (VDD=8, VSS=4, 0.1 µF decoupling), amplifier A.
  2. Build the mid-rail reference: +5 V → 100 kΩ → node VB → 100 kΩ → gnd, and a 0.1 µF from VB to ground. Measure VB ≈ 2.50 V with the Fluke.
  3. Bias IN A+ (pin 3) to VB through a 100 kΩ, and AC-couple the DAC signal into pin 3 through a 10 µF series cap.
  4. Feedback: OUTA (pin 1) → Rf → IN A− (pin 2) → Rg → VB. Returning Rg to VB (not ground) sets the DC operating point of IN− to the same mid-rail, so the DC gain to the bias is 1 while the AC gain is \(1 + R_f/R_g\). Start with \(R_f = R_g = 1\text{ kΩ}\) → \(G = 2\).

Part B — Spot-check the gain.

  1. Program the MCP4725 to output a 1 kHz sine, ~0.4 Vpp, centered near mid-rail (small enough to stay linear). Scope CH1 on IN A+, CH2 on OUTA, both DC-coupled.
  2. Use the scope’s auto measure → Vpp on both channels. Compute \(G = V_\text{pp,out}/V_\text{pp,in}\). Expect ≈ 2.0. Confirm the output is centered on ~2.5 V (mid-rail bias working).

Part C — Sweep gain vs. frequency (the GBW demonstration).

  1. Keep \(G = 2\). Step the DAC sine frequency: 1 kHz, 10 kHz, 50 kHz, 100 kHz, 200 kHz, 500 kHz (as high as the DAC update rate allows a clean sine — note the DAC itself bandlimits you; use the highest clean frequency you can, and read the true corner if the DAC can’t reach it). At each frequency read Vpp on both channels and record the gain in dB: \(20\log_{10}(V_\text{out}/V_\text{in})\).
  2. Repeat the sweep for a higher gain, e.g. \(R_f = 9.1\text{ kΩ}, R_g = 1\text{ kΩ}\) → \(G \approx 10.1\). Its −3 dB corner should fall by ~10×, to roughly 100 kHz — a corner you can reach, making the rolloff visible.

Part D — Find each −3 dB point.

  1. For each gain, find the frequency where the measured gain has dropped 3 dB (to 0.707×) from its low-frequency value. Compare to \(f_{-3\text{dB}} = \text{GBW}/G\).

Deliverable & expected results

A bench note (docs/lab-4-2.md) with the predicted/measured gain table and a hand-sketched (or plotted) gain-vs-frequency curve for at least the \(G \approx 10\) case, marking the −3 dB corner.

Config (\(R_f/R_g\)) Predicted gain \(G\) Predicted \(G\) (dB) Predicted \(f_{-3\text{dB}}=\text{GBW}/G\) Measured \(G\) Measured \(f_{-3\text{dB}}\)
1 k / 1 k 2.0 6.0 dB 500 kHz … …
4.7 k / 1 k 5.7 15.1 dB 175 kHz … …
9.1 k / 1 k 10.1 20.1 dB 99 kHz … …
100 k / 1 k 101 40.1 dB 9.9 kHz … …

(GBW = 1 MHz assumed; use your part’s datasheet number if different.)

Analysis & reconciliation

Confirm the low-frequency gains match \(1 + R_f/R_g\) within resistor tolerance. Then check that each measured −3 dB corner tracks \(\text{GBW}/G\) — plotting \(\log(f_{-3\text{dB}})\) vs. \(\log(G)\) should give a slope of −1 (bandwidth halves when gain doubles). If your measured GBW (back it out as \(G \times f_{-3\text{dB}}\)) is consistently a bit below 1 MHz, that’s normal: datasheet GBW is typical, and your breadboard’s stray capacitance adds a little extra rolloff. Two second-order effects to name in the writeup: (1) at higher frequencies the finite slew rate can distort a large-amplitude sine before GBW would — keep amplitudes small to isolate the small-signal bandwidth; (2) the DAC’s own reconstruction rolloff can masquerade as amplifier rolloff, which is exactly why you measure gain as the ratio CH2/CH1 rather than trusting the output amplitude alone.

Going further

  • Measure and plot the phase shift vs. frequency (scope phase cursor or the auto-measure phase between CH1 and CH2). A single-pole rolloff approaches −45° at the corner and −90° a decade above it — confirm the phase corner coincides with the −3 dB magnitude corner.
  • Cascade two lower-gain stages (using both amplifiers in the MCP6002) to reach a high total gain with more bandwidth than one high-gain stage — a first taste of why real front ends distribute gain.
  • Deliberately raise the input amplitude at \(G = 10\) until the output flattens against the rails: that’s the entry to Lab 4.3 — Op-Amp Clipping.